ISPD 2020 Slides

ISPD 2020 had a strong technical program with peer-reviewed papers, invited papers, and tutorials. Continuing the tradition of ISPD, we had a great contest. Accepted and invited papers for ISPD 2020 were published, and are available in the ACM digital library.

Congratulations for the best paper award to Wei Ye, Mohamed Baker Alawieh, Yuki Watanabe, Shigeki Nojima, Yibo Lin, and David Z. Pan for their paper, “TEMPO: Fast Mask Topography Effect Modeling with Deep Learning”.

ISPD 2020 special session on the Wafer Scale Placement Contest

"ISPD 2020 Wafer-Scale Deep Learning Accelerator Placement Contest: Overview and Results", Marvin Tom and Patrick Groeneveld - Cerebras Systems; with video presentations by the top five teams. Video and slides.

Congratulations for first place in the Wafer-Scale Deep Learning Accelerator Placement contest to Bentian Jiang, Jingsong Chen, Jinwei Liu, Xiaopeng Zhang, Fangzhou Wang, Lixin Liu, and Evangeline F.Y. Young from the Chinese University of Hong Kong.

Session 1: Placement

"Hill Climbing with Trees: Detail Placement for Large Windows", Mohammad Khasawneh and Patrick H. Madden - State University of New York at Binghamton video and slides

"Via Pillar-Aware Detailed Placement", Yong Zhong, Tao-Chun Yu, Kai-Chuan Yang and Shao-Yun Fang - National Taiwan University of Science and Technology slides

"Soft-Clustering Driven Flip-flop Placement Targeting Clock-induced OCV", Dimitrios Mangiras, Pavlos Mattheakis, Pierre-Olivier Ribet and Giorgos Dimitrakopoulos - Democritus University of Thrace, and Mentor, a Siemens Business slides

"Pseudo-3D Approaches for Commercial-Grade RTL-to-GDS Tool Flow Targeting Monolithic 3D ICs", Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim and Sung Kyu Lim - Georgia Institute of Technology slides

Session 2: Machine Learning for Physical Design

"Transforming Global Routing Report into DRC Violation Map with Convolutional Neural Network", Wei-Tse Hung, Jun-Yang Huang, Yih-Chih Chou, Cheng-Hong Tsai and Mango Chao - National Chiao Tung University and Global Unichip Corporation (best paper award nominee)

"Lookahead Placement Optimization with Cell Library-Based Pin Accessibility Prediction via Active Learning", Tao-Chun Yu, Shao-Yun Fang, Hsien-Shih Chiu, Kai-Shun Hu, Philip Hui-Yuh Tai, Cindy Chin-Fang Shen and Henry Sheng - National Taiwan University of Science and Technology, and Synopsys slides

"TEMPO: Fast Mask Topography Effect Modeling with Deep Learning", Wei Ye, Mohamed Baker Alawieh, Yuki Watanabe, Shigeki Nojima, Yibo Lin and David Z. Pan - University of Texas at Austin, Peking University, and Kioxia Corporation (best paper) slides

"DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network", Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi Reddy, Shyam Ramji, Gi-Joon Nam and Jiang Hu - Texas A&M University, and IBM Research video and slides

Session 3: Circuit Design and Security

"Design Optimization by Fine-Grained Interleaving of Local Netlist Transformations in Lagrangian Relaxation", Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, David Chinnery and Giorgos Dimitrakopoulos - Democritus University of Thrace, University of Cyprus, and Mentor, a Siemens Business video and slides

"Selective Sensor Placement for Cost-Effective Online Aging Monitoring and Resilience", Hao-Chun Chang, Li-An Huang, Kai-Chiang Wu and Yu-Guang Chen - National Chiao Tung University, National Central University, and Cadence Design Systems slides

Session 4: Timing and Clocking

"Synthesis of Clock Networks with a Mode Reconfigurable Topology and No Short Circuit Current", Necati Uysal, Juan Ariel Cabrera and Rickard Ewetz - University of Central Florida slides

"Timing Driven Partition for Multi-FPGA Systems with TDM Awareness", Sin-Hong Liou, Sean Liu, Richard Sun and Hung-Ming Chen - National Chiao Tung University, and Synopsys (best paper award nominee) slides