Physical design automation has been a key enabling technology for high-quality and cost-effective integrated circuit design. However, recent advances in integrated circuit manufacturing processes and applications have brought lots of new challenges to physical design. First, physical design tools need to handle the complicated design constraints and objectives of diverse emerging process technologies like multiple patterning lithography, electron-beam lithography (EBL), directed self assembly (DSA), 3D integration, FinFET/multigate devices, photonic devices, and spintronic devices. Second, physical design is also a critical design stage to satisfy the increasingly stringent requirements in power, timing, reliability, etc. Third, given the ever-increasing design scale and complexity, it is important for physical design tools to take advantage of computing platforms employing multi-core, GPU and FPGA based hardware acceleration. These new challenges necessitate the research and development of new physical design techniques and methodology.
We welcome original contributions that address the above and other related issues. More specifically, research papers with emphasis on the following topics are of particular interest:
|Initial submission deadline||May 15, 2017|
|First decision||June 19, 2017|
|First revision deadline||July 16, 2017|
|Second decision||August 14, 2017|
|Second revision deadline||September 11, 2017|
|Final decision||October 2, 2017|
|Camera-ready manuscript submission deadline||October 30, 2017|
The general guidelines for TODAES submissions are given at: http://todaes.acm.org/authors.cfm
In addition, in Step 5 of the submission process, please choose "Yes" for the question "Is this manuscript a candidate for a special issue?". Then, enter "ISPD Special Section" in the "Write Cover Letter" field on the same page.
Please address any correspondence regarding this special issue to the guest editors:
Iowa State University