0 0 5000000 5000000
source 0 0 0 0
num sink 4
1 1200000 1300000 35
2 4000000 1200000 35
3 1300000 3800000 35
4 3700000 3300000 35
num wirelib 2
0 0.0001 0.0002
1 0.0003 0.00016
num buflib 1
0 clkinv0.subckt 1 35 80 61.2
1 clkinv1.subckt 1 4.2 6.1 440
simulation vdd 1 1.2
limit slew 100
limit cap 5000
num blockage 4
1000 1000 1000000 2800000
1000 3000000 1800000 3400000
1000 3500000 1000000 4800000
2100000 2800000 3500000 4800000
