ISPD 2016 : Routability-Driven FPGA Placement Contest

Announcements

  • April 6, 2016: ISPD 2016 contest was successfully completed. The winners are:
    • First place: UTPlacer, University of Texas at Austin
    • Second place: RippleFPGA, The Chinese University of Hong Kong
    • Third place: GPlace, University of Guelph
    • Fourth place: UFRGSPlace, Federal University of Rio Grande do Sul, and
    • Fourth place: VDAplacer, National Chiao Tung University
  • February 25, 2016: Updated benchmarks [3] [4] . Fixed missing IBUF location problem.
  • February 24, 2016: Released two new benchmarks [3] [4] .
  • February 19, 2016 Updated submission schedule:
    Binary Date Description
    Alpha Feb 15th Ensure that binary runs on testing platform. No library dependence issues.
    Beta Mar 7th Screen testing: binary runs. no catastrophic failures. Pass legalization for most designs.
    Final Mar 14th Final executable that runs on contest benchmarks.
  • February 11, 2016 Updated the Legalization page with one correction and one clarification.
  • February 05, 2016: Vivado placement evaluation flow is ready. Click here for instructions. Note that you need to download the full benchmarks for the evaluation flow.
  • February 05, 2016: Updated full benchmarks [1] [2] .
  • February 03, 2016: Binary submission dates: Alpha version February 15; Final version March 21
  • January 08, 2016: An FAQ page is added for common questions and bookshelf format.
  • January 08, 2016: Please check Team Summary to confirm your team is officially included in the contest.
  • January 08, 2016: Updated benchmarks [1] [2] with design.pl issues fixed.
  • January 05, 2016: Contest registration is closed. There are 19 teams signed up for the contest.
  • December 18, 2015: Contest email-list was created. If you have signed up for the contest but did not receive emails, click here to join the group (specify your placer name and affiliation).
  • December 18, 2015: Released placement Legalization Rules .
  • December 18, 2015: Updated benchmarks [1] [2] .
  • December 16, 2015: Updated benchmarks [1] [2] .
  • December 15, 2015: Updated benchmarks [1] [2] .
  • December 14, 2015: Released second benchmark and updated first benchmark .
  • December 11, 2015: Register deadline is extended to December 31, 2015.
  • December 11, 2015: Released Contest Evaluation and Ranking .
  • November 30, 2015: Released sample benchmark .
  • October 26, 2015: Contest topic announced. Please read the call for participation document for details.

Downloads

File Description Last Update
FPGA-example4.tar.gz Large FPGA placement benchmark in enhanced bookshelf format 2016/02/24
FPGA-example3.tar.gz Large FPGA placement benchmark in enhanced bookshelf format 2016/02/24
FPGA-example2.tar.gz Large FPGA placement benchmark in enhanced bookshelf format 2016/02/08
FPGA-example1.tar.gz Small FPGA placement benchmark in enhanced bookshelf format 2016/02/08
ISPD_2016_Contest_CFP.pdf Call for participation and contest description. 2015/10/26